Impact of Process Variation on Leakage and Drive Currents of FED Structures Using Linear Regression and Random Forest Algorithms

This study examines the influence of process variation on the drive current (I ON ), leakage current (I OFF ), and the (I_ON/I_OFF) ratio in three distinct Field Effect Diode (FED) structures as documented in previous research. Through TCAD simulations, a comprehensive factorial design was established, encompassing geometrical, doping, and work function parameters, resulting in over 4000 data points. The simulation outcomes were segmented into training and testing datasets and analyzed using linear regression and random forest methodologies. The objective was to discern patterns within the I ON , I OFF , and (I_ON/I_OFF) values and to develop a predictive model to classify the parameters. Notably, linear regression was deemed apt for interpreting I ON and (I_ON/I_OFF) ratios, while the random forest approach was more fitting for I OFF . A pivotal finding was the significant role of Silicon epilayer thickness in impacting I ON , I OFF , and the (I_ON/I_OFF) ratio. Additionally, it was determined that the work function of the source gate (WF Gs ) and the length of the drain gate (L Gd ) are the next two significant parameters.