Disintegrating Manycores: Which Applications Lose and Why?

Isidor R. Brkic,Mark C. Jeffrey

PROCEEDINGS OF THE 2023 16TH INTERNATIONAL WORKSHOP ON NETWORK ON CHIP ARCHITECTURES, NOCARC 2023(2023)

引用 0|浏览0
暂无评分
摘要
The economics of Moore's Law are stumbling, so vendors of many-core architectures are transitioning from single-die monolithic designs to multi-chiplet disintegrated systems within a package. Disintegration lowers cost for the same number of cores but bottlenecks the interconnect. Ideally, disintegration should increase performance per dollar: cost savings should outweigh the disintegration slowdown. Although industry has reported cost savings, the performance penalty of disintegration is not well studied. This paper presents the first characterization, to our knowledge, of disintegration performance penalty across a diverse suite of applications. Unsurprisingly, applications with high speedups on monolithic systems continue to scale well on disintegrated systems, and vice versa. However, the disintegration slowdown compared to an equivalently sized monolith exhibits high variance across applications, with some achieving just over half the performance. Why do some applications get a performance per dollar win, while others lose? Through regression analysis, we find that metrics relating to the network-on-package bandwidth and data sharing correlate with disintegration slowdown. Programmers were already cautioned against shared mutable data on monolithic systems, yet data sharing is unavoidable in many applications. These applications will be disproportionately harmed in the disintegrated future.
更多
查看译文
关键词
silicon interposer,multi-chip module,disintegration slowdown,chiplets,data sharing,regression
AI 理解论文
溯源树
样例
生成溯源树,研究论文发展脉络
Chat Paper
正在生成论文摘要