Invited: Pre-silicon Side Channel and Fault Analysis.

In this work, we address the challenges of side channel analysis (SCA) and fault injection (FI) in the pre-silicon design stage, particularly for cryptographic implementations. We show that the industry perspective uncovers different challenges than those usually tackled by academia, emphasizing the need for practical and scalable solutions. We present (Side Channel Attack Testbench Emulator) SCATE, a framework for detecting and mitigating SCA vulnerabilities, leveraging industry-standard electronic design automation (EDA) software for efficient power estimation and FI simulations. Moreover, we demonstrate a significant performance increase in power simulation tools by optimizing EDA algorithms for SCA applications, resulting in faster power trace generation. Additionally, we discuss the application of formal property verification (FPV) for verifying fault injection countermeasures and present a case study on an AES S-box. These approaches enable non-security-expert designers to evaluate SCA and FI resistant designs with significant time savings. The vulnerabilities uncovered by these approaches highlight the importance of pre-silicon analysis at each design stage to produce secure application-specific integrated circuits (ASICs).