A Ka-Band SiGe BiCMOS Quasi-F^-1 Power Amplifier Using a Parasitic Capacitance Cancellation Technique

This paper deals with the design, analysis, and implementation of a Ka-band, single-stage, quasi-inverse class F power amplifier (PA). A detailed methodology for the evaluation of the active device's output capacitance is described, enabling the designing of a second-harmonically tuned load and resulting in enhanced performance. A simplified model for the extraction of time-domain intrinsic voltage and current waveforms at the output of the main active core is introduced, enforcing the implementation process of the proposed quasi-inverse class F technique. The PA is fabricated in a 130 nm SiGe BiCMOS technology with f(T)/f(max)=250/370 GHz and it is suitable for 5G applications. It achieves 33% peak power-added efficiency (PAE), 18.8 dBm saturation output power P-sat, and 14.7 dB maximum large-signal power gain G at the operating frequency of 38 GHz. The PA's response is also tested under a modulated-signal excitation and simulation results are denoted in this paper. The chip size is 0.605x0.712 mm(2) including all pads.