The I-D Instability Induced by Reverse Conduction Stress in p-GaN Gate HEMTs

In this work, the impact of reverse conduction stress on the output current (ID) instability in p-GaN gate HEMT are investigated. With more negative drain stress (V-DS,V-str below -5 V), the I-D,I-max shows a positive shift in the I-D-V-DS measurement at V-GS = 3 V and a negligible change at V-GS = 5 V, meanwhile the V-TH shows a negative shift after the stress. By contrast, the I-D,I-max is basically unchanged with the V-DS,V-str above -5 V. Through the simulation and extended experiments, it is found that the hole tunneling under the more negative V-DS,V-str and the subsequent hole accumulation and trapping within the gate stack dominate the I-D,I-max instability. The comparison of gate leakage and the transmission electron microscopy (TEM) observation before and after the stress further shows that the gate stack degenerates.