Theoretical analysis for low voltage ride through capability in doubly-fed induction generator-based wind turbines with stator resistive hardware model

Grid code requirements must be provided in the grid-connected operation of Doubly fed induction generator (DFIG)-based wind turbines. For this, many methods have been developed in DFIG-based wind turbines. Low voltage ride through (LVRT) capability is one of the most effective methods to meet the grid code requirement in DFIG. LVRT is the principal method used to decrease voltage dips and overcurrents caused by various symmetrical and asymmetrical faults. One of the efficient and economical methods of providing LVRT capability is Stator resistive hardware model (SRHM). This study developed the SRHM to remove oscillation that may occur during symmetrical and asymmetrical faults. In addition, stator–rotor electromotive force models in DFIG were enhanced with the aim of increasing simulation study performance, calculation, and stability in the system during various faults. In both symmetrical and asymmetrical fault operations, the results indicated that the proposed SRHM and stator-rotor electromotive force models provided dynamic stability of the system and eliminated oscillations.