3-Layer Stacked Voltage-Domain Global Shutter CMOS Image Sensor with 1.8 mu m-Pixel-Pitch
2022 INTERNATIONAL ELECTRON DEVICES MEETING, IEDM(2022)
摘要
A voltage-domain global shutter image sensor with 1.8 mu m-pixel-pitch was fabricated based on a 3-layer stacking scheme enabled by pixel-level Cu-to-Cu bonding processes. Excellent sensor performances i.e. ultra-low parasitic light sensitivity less than -130dB, 1.8e-rms of temporal noise, and 14ke- of full-well capacity were achieved, thanks to high-capacity DRAM capacitors, dual vertical-channel transfer gates and high conversion gain (mu V/e-) in a floating diffusion node. It is, to our best knowledge, the smallest global shutter pixel ever reported with superior pixel performances.
更多查看译文
关键词
3-layer stacked voltage-domain global shutter CMOS image sensor,Cu-Cu/int,DRAM capacitors,dual vertical-channel transfer gates,floating diffusion node,pixel-level Cu-to-Cu bonding processes,ultralow parasitic light sensitivity
AI 理解论文
溯源树
样例
![](https://originalfileserver.aminer.cn/sys/aminer/pubs/mrt_preview.jpeg)
生成溯源树,研究论文发展脉络
Chat Paper
正在生成论文摘要