Highly Reliable, Scalable, and High-Yield HfZrOx FRAM by Barrier Layer Engineering and Post-Metal Annealing

A highly reliable HfZrOx FRAM technology showing endurance up to 10(12) cycles and 10(10) cycles at 27 degrees C and 120 degrees C, respectively, in a scaled cell area of 0.36 mu m(2) has been demonstrated. The improved endurance is accomplished through barrier layer engineering of inserting TiON and 400 degrees C post-metal annealing. Furthermore, wake-up-free 4 Kb 1T1C FRAM test chips show an extremely high initial yield of >98% across a wafer. The robust high-temperature reliability and high-yield array demonstrate high promise for future applications in automobile electronics.