A User-Friendly Fast and Accurate Simulation Framework for Non-Ideal Factors in Computing-in-Memory Architecture

Computing-in-memory (CIM) architecture utilizing emerging non-volatile devices is promising for energy-efficient neural network (NN) applications. However, the non-ideal factors of non-volatile devices and analog circuits may incur severe accuracy loss, which cuts the algorithm and hardware design apart. The algorithm/hardware designers are skilled in either macro-scope NN models or detailed circuit/device errors, while sophisticated research of the joint effect on accuracy loss is urgently needed. In this paper, we propose a user-friendly, fast, and accurate simulation framework (CIMUFAS) to explore the impact of various non-ideal devices/circuits on algorithm accuracy. Based on multiple architecture-level CIM mapping/scheduling workflow, sophisticated non-ideal factors with different error models are established. The CIMUFAS also provides easy-to-use interfaces to flexibly support user-defined models/parameters for specified devices/circuits. Besides, the CIMUFAS framework achieves reasonable simulation time. Compared with MNSIM 2.0, the simulation time is reduced by 45% even after adding a more realistic hardware configuration. This CIMUFAS framework is verified with two fabricated CIM chips with <0.04% accuracy mismatch. The source code of CIMUFAS is publicly available at https://github.com/Hlal/CIMUFAS.