A High-Efficiency W-Band Frequency Quadrupler With Current-Reusing Stacked Push–Push Stages

This letter presents a $W$ -band frequency quadrupler with current-reusing stacked push–push doubler (PPD) stages, implemented in a 180-nm SiGe BiCMOS process. A series balun is used between two PPDs to generate differential signals for the second PPD stage, while also allowing half of the second stage’s current to be reused in the first doubler stage, thereby improving efficiency. The circuit exhibits a compelling output power, peak conversion gain, bandwidth, harmonic rejection, and efficiency for a quadrupler in this frequency range across a 3-dB bandwidth of 76–94 GHz. The quadrupler achieves a peak conversion gain of 13.5 dB, a peak output power of 8.7 dBm, and a maximum dc-to-RF efficiency of 6.4%.