Power Estimation of QPSK and BPSK Modulation Systems for FPGAs based on IP Modeling for Wireless Applications

Abstract FPGA market has expanded due to its adoption in mobile phones and wearable devices. The communication IP blocks in Field Programmable Gate Array (FPGAs) has made it possible to realize different communication systems. However, in spite of their high performance, FPGAs suffers from high power consumption due to their complex architecture as compared to their ASIC counterpart. This has made power estimation as an important design metric. The existing commercial tools provide the option to estimate the power, but at the cost of longer estimation time as the designs have to follow the complete design cycle. Moreover, literature, mostly focuses on power estimation of individual blocks and power estimation of the complete system is still in infancy stage. Therefore, in this work, Quadrature Phase Shift Keying (QPSK) and Binary Phase Shift Keying (BPSK) modulation systems have been designed that are used in various wireless and satellite communication applications. Further, a new identity is proposed that could evaluate the power of whole system. The QPSK and BPSK systems have been designed via embedded IP and user-defined IP cores. A power estimation model of diverse blocks of QPSK and BPSK modulation systems have been developed based on a supervised machine learning technique using MATLAB R2016b and models are validated against commercial tool. Finally, the power of complete QPSK and BPSK modulation system is estimated using the proposed identity and is also validated for accuracy with reference to Vivado 2014.2 tool targeted to the Zynq family device and state of the art work. It has been seen from the results that the proposed identity outperforms in power estimation of complete systems as compared to existing identities available in literature and is providing aligned results with reference to the commercial tool.