Interfacial Dislocation Reduction by Optimizing Process Condition in SiC Epitaxy

It is known that generation of interfacial dislocation on SiC epitaxy depends mainly on misfit strain between substrate and the epilayer. In this paper, we investigate the impact of temperature profile, doping profile of the epilayer and resistivity of the substrates on the formation of interfacial dislocation in epilayers. Our preliminary results show that thermal profile during the epitaxy plays a key role in formation of interfacial dislocations in epilayers. We demonstrated reduction or elimination of interfacial dislocation in epilayers by optimizing the temperature profile of the wafers during the epitaxial growth.