FPGA-Based Accelerator for AI-Toolbox Reinforcement Learning Library

IEEE Embedded Systems Letters(2023)

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摘要
In reinforcement learning (RL) an agent interacts with the environment based on sequential decisions. This agent receives a reward from the environment according to decisions and tries to maximize the reward. RL is used in several domains, such as production, autonomous driving, business management, education, games, healthcare, natural language processing, robotics, and among others. RL methodologies require processing large volumes of data and computational power. To speed up these applications, field-programmable gate array (FPGA) are widely employed in the literature. This letter proposes an accelerator for theMarkov decision process (MDP) implemented in the AI-Toolbox public library using high-level synthesis tools, using the tiger-antelope problem as use case. Our approach shows an acceleration greater than 7x compared to the original version.
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关键词
Field-programmable gate array (FPGA),high-level synthesis (HLS),reinforcement learning (RL)
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