33.1 A 16nm 32mb Embedded STT-MRAM with a 6ns Read-Access Time, a 1M-Cycle Write Endurance, 20-Year Retention at 150°C and MTJ-OTP Solutions for Magnetic Immunity
2023 IEEE International Solid-State Circuits Conference (ISSCC)（2023）
Key words
array-edge effect,array-level variability,automotive applications,automotive market transitions,back-end-of-line memories,current 33.1 A,embedded nonvolatile memory,embedded STT-MRAM,eNVM densities,external-magnetic-field interference,FinFET CMOS process,generation automotive MCU application,greater electrification,high write endurance,high-temperature data retention,magnetic immunity,magnetic tunnel junctions,MTJ-based one-time programmable,MTJ-OTP solutions,novel merged-local-reference scheme,over-the-air updates,process integration,read-access time,size 16.0 nm to 55.0 nm,STT-MRAM test chip,system design,temperature 150.0 degC,temperature 360.0 degC,time 3.0 hour,time 6.0 ns,traditional charge-based embedded flash,transition technology nodes,wafer-level chip-scale packaging process,write endurance
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