The Best, the Requested, and the Default Elementary Check Node for EMS NB-LDPC Decoder

Non-Binary LDPC codes are known to have good decoding capability and high decoding complexity. Therefore, their utilization is limited to low-rate applications such as BeiDou, the Chinese Global Navigation Satellite Systems. Recently, a new decoding algorithm called the Best, Requested, and Default algorithm has been proposed. The algorithm significantly reduces the size of exchanged messages between the variable nodes and check nodes leading to simplifying the hardware architecture. This paper presents the adaptation and the impact of the algorithm on the Extended Min-Sum Forward-Backward check node processor. The proposed decoder is simulated for several code rates and negligible degradation is observed compared to the classical EMS algorithm. In addition, the proposed decoder is synthesized on FPGA in a fully-parallel fashion. The proposed decoder requires only 42% of the memory allocations and 85% of the computational resources of the classical EMS decoder.