A 1-MHz-Bandwidth Continuous-Time Delta-Sigma ADC Achieving >90dB SFDR and >80dB Antialiasing Using Reference-Switched Resistive Feedback DACs

Continuous-time delta-sigma (CT DSM) ADCs offer implicit antialiasing and a resistive input impedance. This allows a dramatic relaxation of the ADC’s antialiasing filter requirement and a drastic simplification of its driver’s design. This has proved transformative in the particular case of integrated narrowband direct conversion receivers (RXs) where, following the mixer, a simple T1A with a firstorder roll-off is sufficient to drive the ADC (Fig. 1). The ADC, however, must be easy to integrate, have no signal transfer function (STF) peaking, and satisfy the stringent requirements of >90dB SFDR with >80dB antialiasing and an NSD <-150dBFS/Hz over lMHz bandwidth with low power dissipation. The resistive feedback DAC (RDAC) has been critical to achieving a low-NSD CT DSM with low power. However, reference-switched RDACs (Fig. 2) suffer from higher sensitivity to reference impedance [1]. The virtual-ground-switched RDAC[I] is less sensitive to this, but sampling of the virtual ground node by the RDAC switches severely degrades the ADC’s antialiasing; e.g., it is only 50dB in [1] [2]. Further, prior RDAC work relies on off-chip references [1] –[4], a major limitation for an ADC that is part of a production-level integrated RX due to associated overheads such as extra 1/O pins and need for external decoupling.