Research on Highly Portable Lightweight Physical Unclonable Functions Using Multiplexer Entropy Sources

SR Latches Physical Unclonable Functions (PUFs) are the most popular FPGA-based cryptographic applications and have a broad market in lightweight IoT devices. To realize a symmetric unbiased SR latch PUF, different implementation methods that increase area consumption have been proposed. In this paper, a novel MUX-unit-based delay gate is proposed to form the M_SR PUF unit, and the output of the SR latch in the steady state is extracted as the response of the PUF. To verify the proposed M_SR PUF, it is implemented on three series of FPGAs from Xilinx Virtex-6, Virtex-7 and Kintex-7. It is worth mentioning that the symmetrical layout is relatively simple to implement through "hard macros", which ensures better performance of PUF. The experimental results show that the proposed M_SR PUF can work stably under an ultra-wide range of environmental changes (temperature: 0 degrees C similar to 80 degrees C; voltage: 0.8 similar to 1.2 V) with an averageuniqueness of 50.125%. Furthermore, the proposed M_SR PUF unit is characterized by low overhead, consuming only 4 MUXs and 2 DFFs, and produces a high-entropy response suitable for hardware security applications