DAVOS: EDA Toolkit for Dependability Assessment, Verification, Optimisation and Selection of Hardware Models

Ilya Tuzov,David de Andrés, Juan Carlos Ruiz

2018 48th Annual IEEE/IFIP International Conference on Dependable Systems and Networks (DSN)(2018)

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摘要
The high complexity of new designs and time-to-market pressure have caused design reuse to be at the heart of the common semi-custom hardware design flow. Accordingly, current Electronic Design Automation (EDA) toolchains are developed to support a wide range of hardware description languages, third-party EDA tools, intellectual property cores, and implementation technologies and goals. However, the seamless integration of dependability requirements into such toolchains remains today an open challenge. This paper presents DAVOS, an EDA toolkit supporting assessment, verification, optimisation (design space exploration), and selection (benchmarking) processes for dependability-aware hardware implementations. This toolkit fully automates these processes with efficiency and flexibility in mind, so underlying implementation and analysis phases can be customized to consider alternative off-the-self languages, tools, components and technologies from a dependability perspective. Three different embedded processor models exemplify the design scenarios supported by DAVOS.
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关键词
Electronic Design Automation,Dependability assessment,Verification,Optimisation,Dependability benchmarking,Design Space Exploration
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