Dynamic Keeper for 1R1W 8T-SRAM to Enable Read Operation at 150c till 0.5v in 5nm FinFET

We developed a high-density 1R1W SRAM macro based on 8T-Bitcell to support low voltage read1/read0 operation down to 0.5v. The proposed Dynamic strength keeper design enabled the reliable read operation for a temperature range of -40°C to 150°C in 5nm FinFET technology. 8T SRAM suffers the read0 failure at cold and read1 failure at hot temperature. This paper illustrates a dynamic keeper whose drive strength is dynamically modulated, depending on the operating temperature. In this way, we mitigate the read1 disturbance at hot temperature and read0 disturbance at cold temperature. The dynamic modulation of the keeper improved the access time which is considered a very critical parameter of 8T SRAM. The proposed keeper reduces Vmin by ~100mv to support functionality till 0.5v w.r.t. to the conventional fixed strength keeper design approach. Simulation results show a gain of 15-20% performance boost for the normal operating voltage (0.75±10%) of 5nm technology when compared to conventional keeper design practice.