Ferroelectric Junctionless Double-Gate Silicon-On-Insulator FET as a Tripartite Synapse

In this work, we report the concept and experimentally demonstrate the first tunable ferroelectric (Fe) junctionless (JL) transistor (Fe-JLFET), capable of emulating the functionality of biological tri-partite synapses, which is an artificial three-terminal synapse with unique back gate high tuning of the post-synaptic current (PSC). Our device consists of a double-gate 11nm-thin film Fe-JLFET with 10nm Si-doped HfO textsubscript 2 ferroelectric, mimicking the functionality of a tripartite synapse. The gradual ferroelectric switching is exploited to fully reproduce the synaptic plasticity. The back-gate voltage emulates the function of an astrocyte, being used to tune the synaptic weight by more than $400\times $ . Compared to other implementations, the newly proposed tripartite Fe-JLFET synapse device shows simplicity in fabrication, extended programmability, and robustness. We report plasticity until 2000 cycles of operation. Overall, this device concept is promising for CMOS-compatible energy-efficient implementation of future neuromorphic ICs.