3.1 A 120.9dB DR, -111.2dB THD+N Digital-Input Capacitively-Coupled Chopper Class-D Audio Amplifier

Class-D amplifiers (CDAs) are widely used in audio applications where a high power efficiency is required. As most audio sources are digital nowadays, implementing digital-input CDAs results in higher levels of integration and lower cost. However, prior open-loop digital-input CDAs suffer from high jitter sensitivity and output-stage distortion. In [1], jitter sensitivity at small signal levels is mitigated using a buck-boost converter that adaptively lowers the supply at the expense of extra external components and reduced power efficiency. Prior closed-loop digital-input CDAs employing multi-bit current-steering [2] or resistive [3] DACs are less sensitive to jitter, but their DR is limited to about 115dB. DAC non-idealities and intermodulation distortion are also challenges, and prior works only achieved a peak $\text{THD}+\mathrm{N}$ of about $-98\text{dB}$ [2], [3]. This paper presents a digital-input CDA that achieves high DR by combining a low-noise capacitive DAC (CDAC) with dedicated techniques to mitigate DAC mismatch, lSI, and intermodulation distortion. A prototype implemented in a $0.18\mu\mathrm{m}$ BCD process achieves 120.9dB DR and $-111.2\text{dB}$ peak $\text{THD}+\mathrm{N}$ . Furthermore, it can deliver 13W/23W at 10 ^% THD into an $8\Omega/4\Omega$ load with a 90%/86% efficiency.