Characterization of 3.2 Gbps readout in 65 nm CMOS technology

JOURNAL OF INSTRUMENTATION(2023)

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Abstract
A new class of photon-counting pixel detectors allows for capturing of an image in several photon energy bins in one shot. A decreased pixel pitch and an increased number of energy bins are needed to enhance the spatial and spectral resolution of the detector. This led to new requirements for the readout systems and their bandwidths, as more data is generated for the same detection area. Fast differential serial communication enables high-speed data rates, thus providing an ideal solution to transfer large amounts of data generated by the detector's front-end electronics. However, its implementation provides extra challenges. This work introduces a novel high-speed serial readout designed in a 65 nm CMOS technology that will be used in the future photon-counting X-ray imaging detectors. The design of the serial transmitter is presented together with the characterization of jitter and channel performance.
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Key words
Data acquisition circuits,Electronic detector readout concepts (solid-state),Pixelated detectors and associated VLSI electronics
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