An 8b 1.0-to-1.25GS/s 0.7-to-0.8V Single-Stage Time-Based Gated-Ring-Oscillator ADC with $2\times$ Interpolating Sense-Amplifier-Latches.Serdar A. Yonar,Pier Andrea Francese,Matthias Brändli,Marcel A. Kossel,Mridula Prathapan,Thomas Morf,Andrea Ruffino,Taekwang JangISSCC(2023)引用 5|浏览39暂无评分AI 理解论文溯源树样例生成溯源树,研究论文发展脉络Chat Paper正在生成论文摘要