Design and Testing of Digital Logic Gates Using HCS Macro-Model

Snigdha Chowdhury Kolay,Mandakinee Bandyopadhyay,Subrata Chattopadhyay

IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS（2023）

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Key words

Logic gates,Integrated circuit modeling,Mathematical models,Semiconductor device modeling,Matlab,Voltage,MOSFET,CMOS,Hybrid CMOS SET,macro model,SIMSCAPE,SIMULINK,single electron transistor (SET)

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