Analytical and Physical Investigation on Source Resistance in In_xGa_1-xAs Quantum-Well High-Electron-Mobility Transistors

We present a fully analytical model and physical investigation on the source resistance (R-S) in InxGa1-xAs quantum-well high-electron mobility transistors based on a three-layer TLM system. The R-S model in this work was derived by solving the coupled quadratic differential equations for each current component with appropriate boundary conditions, requiring only six physical and geometrical parameters, including ohmic contact resistivity (rho(c)), barrier tunneling resistivity (rho(barrier)), sheet resistances of the cap and channel regions (R-sh_cap and R-sh_ch), side-recessed length (L-side) and gate-to-source length (L-gs). To extract each model parameter, we fabricated two different TLM structures, such as cap-TLM and recessed-TLM. The developed R-S model in this work was in excellent agreement with the R-S values measured from the two TLM devices and previously reported short-L-g HEMT devices. The findings in this work revealed that barrier tunneling resistivity already played a critical role in reducing the value of R-S in state-of-the-art HEMTs. Unless the barrier tunneling resistivity is reduced considerably, innovative engineering on the ohmic contact characteristics and gate-to-source spacing would only marginally improve the device performance.