Resource-constrained FPGA Design for Satellite Component Feature Extraction
CoRR(2023)
Abstract
The effective use of computer vision and machine learning for on-orbit applications has been hampered by limited computing capabilities, and therefore limited performance. While embedded systems utilizing ARM processors have been shown to meet acceptable but low performance standards, the recent availability of larger space-grade field programmable gate arrays (FPGAs) show potential to exceed the performance of microcomputer systems. This work proposes use of neural network-based object detection algorithm that can be deployed on a comparably resource-constrained FPGA to automatically detect components of non-cooperative, satellites on orbit. Hardware-in-the-loop experiments were performed on the ORION Maneuver Kinematics Simulator at Florida Tech to compare the performance of the new model deployed on a small, resource-constrained FPGA to an equivalent algorithm on a microcomputer system. Results show the FPGA implementation increases the throughput and decreases latency while maintaining comparable accuracy. These findings suggest future missions should consider deploying computer vision algorithms on space-grade FPGAs.
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Key words
acceptable but low performance standards,ARM processors,comparably resource-constrained FPGA,computer vision algorithms,embedded systems,equivalent algorithm,Florida Tech,FPGA implementation,hardware-in-the-loop experiments,larger space-grade field programmable gate arrays,machine learning,microcomputer system,neural network-based object detection algorithm,on-orbit applications,ORION Maneuver Kinematics Simulator,recent availability,resource-constrained FPGA design,satellite component feature extraction,satellites,space-grade FPGAs
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