Specificities of linear Si QD arrays integration and characterization.

Heimanu Niebojewski,Benoit Bertrand,E. Nowak, Thomas Bedecarrats,Bruna Cardoso Paz,Lauriane Contamin,Pierre-André Mortemousque, V. Labracherie, L. Brevard,H. Sahin,Jean Charbonnier,C. Thomas, Myriam Assous,Mikaël Cassé,Matias Urdampilleta,Yann-Michel Niquet, François Perruchot, Fred Gaillard,Silvano De Franceschi,Tristan Meunier,Maud Vinet

Symposium on VLSI Circuits (VLSIC)（2022）

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摘要

The low temperature operation of quantum computing devices implies developing characterization protocols, from extensive statistical tests to targeted device screening at cryogenic temperature. This paper reviews major integration constraints arising in linear Si quantum dots arrays and their implication on both the device operation and electrical characterization.

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