A 3V 15b 157μW Cryo-CMOS DAC for Multiplexed Spin-Qubit Biasing.
Symposium on VLSI Technology (VLSI Technology)(2022)
摘要
This paper presents a 15b cryo-CMOS DAC for multiplexed spin-qubit biasing implemented in a 22-nm FinFET process. The integrating-DAC architecture and the robust digitally-assisted high-voltage output stage enable a low power dissipation (157μW) and small area (0.08mm
2
) independent of the number of biased qubits, and a 3V output range well beyond the nominal supply. This represents the first scalable solution for cryo-CMOS qubit biasing, which achieves a 1.8× better voltage resolution with a lower DNL over a 3× larger output range than the current state-of-the-art.
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关键词
low power dissipation,FinFET process,15b cryo-CMOS DAC,multiplexed spin-qubit biasing,cryo-CMOS qubit biasing,high-voltage output stage,integrating-DAC architecture,voltage 3.0 V,power 157.0 muW
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