Implementation of an Ultrasound Data Transfer System via Ethernet with FPGA-Based Embedded Processing

XXVII BRAZILIAN CONGRESS ON BIOMEDICAL ENGINEERING, CBEB 2020(2022)

引用 0|浏览1
暂无评分
摘要
In this paper, we present the implementation of a reconfigurable FPGA-based system for transferring raw ultrasound data using Gigabit Ethernet interface to perform and evaluate the digital signal processing steps according to the Delay-and-Sum (DAS) beamforming method for B-mode imaging, in order to reduce the transfer and computing time. The proposed system consists of two Terasic FPGA development boards and a computer with the Matlab software. The first FPGA board is used for assembling and transmitting data packets with ultrasonic information via Ethernet protocol. The second FPGA board receives the data packets and performs the back-end digital signal processing. The resulting data are transferred to the PC, through a USB port, for scan conversion and image display. The experiments were performed using RF data from an ultrasound phantom for active apertures of 8 and 32 elements. The performance of the proposed algorithm was evaluated by computing the normalized mean square error (NRMSE), contrast ratio (CR) and the contrast-to-noise ratio (CNR) of the reconstructed B-mode images. The analysis of the reconstructed images was performed by comparing the results from the reference Matlab script to results from the Simulink model and the FPGA experimental architecture. The overall processing time was reduced significantly to less than 10 s. Both the qualitative and quantitative analysis results of the generated images indicate that the Simulink and FPGA responses are in excellent agreement with the reference Matlab model.
更多
查看译文
关键词
Ultrasound imaging, Delay-and-Sum beamforming, Ethernet, FPGA
AI 理解论文
溯源树
样例
生成溯源树,研究论文发展脉络
Chat Paper
正在生成论文摘要