A snapshot review on metal–semiconductor contact exploration for 7-nm CMOS technology and beyond

Contact resistances take a significant portion of on-state resistances of advanced Si CMOS transistors. As a result, a metal–semiconductor contact resistivity ( ρ c ) of sub-10 –8 Ω cm 2 or even sub-10 –9 Ω·cm 2 is required to achieve high performance for a very downscaled transistor. In this snapshot review on our ρ c investigation efforts, we first introduce a test structure—a multiring circular transmission line model (MR-CTLM)—with high accuracy to measure ultralow ρ c , and then we evaluate different contact solutions. Our contact solution exploration includes metal/insulator/semiconductor (MIS) contacts for n + -Si and advanced (gemano-)silicides for n + -Si and p + -SiGe. We will discuss limitations of MIS contacts. And we will demonstrate encouraging ρ c of 10 –9 Ω cm 2 that meet the requirement of 7-nm or 5-nm CMOS technology nodes. Graphical abstract