Processing-in-Memory with Temporal Encoding
2022 IEEE Computer Society Annual Symposium on VLSI (ISVLSI)(2022)
摘要
Temporal data representation allows multi-bit data encoding on a single wire based on the rising and falling edges from a temporal reference, and allows multi-bit operations between two temporally-coded data (streams) by using a single gate. Thus, temporal data representation enables area and energy-efficient computing by utilizing simple logic gates. In recent years, Processing-in-Memory (PiM) has become a topic of great interest for accelerating memory-intensive applications, as it reduces data movement costs by bringing computation inside or closer to the memory. Thus, it makes sense to combine these two approaches (i.e., time-domain computation and PiM) to develop computation and memory-intensive machine learning (ML) hardware accelerators for the internet of things (IoT) at the edge. In this paper, we propose an end-to-end Temporal Processing-in-Memory architecture tailored for RAF-AP (Random Forest implementation based on Automata Processing). We make use of the magnetic skyrmion-based temporal memory that reduces data conversion cost by encoding analog input data into time-coded value (stream) during the memory write operation. We also develop the major components of the proposed architecture (non-volatile comparator, non-volatile majority voter) by using a skyrmionic racetrack. Our proposed architecture allows parallel processing of a sequential input stream, eliminating the costly Non-Uniform Memory Access patterns that occur in tree-traversal algorithms. Due to this high parallelism and the PiM nature, the proposed architecture can classify at a 1.935M predictions/s while achieving 94.76% accuracy for the MNIST dataset.
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关键词
Automata Processing (AP),Decision Tree,Random Forest,Racetrack Memory,Skyrmions,Temporal Memory
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