Demodulation using High-Order Moments on a Stochastic Resonance Receiver with a Few-bit ADC

A design with a reduced number of bits resolution in an Analog-to-digital converter (ADC) is required for next-generation wireless communication systems with extremely high frequency. The lower bit resolution causes high nonlinearity. The use of stochastic resonance (SR) has been discussed with reference to the 4-PAM signal to mitigate nonlinearity. In this paper, we propose novel demodulation methods designed for a SR-based receiver with a few-bit ADC. The receiver uses maximum likelihood (ML) estimation; however, this requires the receiver to memorize the number of samples for each ADC output. Thus, we focus on the use of higher-order moments of modulated signals. In addition, we propose a simple method that utilizes only the first-order moment, which avoids calculating higher-order moments. Numerical examples of computer simulations indicate that our methods perform well in a specific range of the signal-to-noise ratio.