A hardware-friendly motion estimation algorithm for the HEVC standard in the context of low-delay video coding

Low-delay video coding systems are becoming more and more popular with each passing year. However, due to huge size of video data, raw video transmission is not possible, and compression is required. High efficiency video coding (HEVC) standard is able to compress videos at half the bitrate as compared to the previous standard. However, HEVC is extremely complex, and its software implementations are either coding-inefficient or slow. Hardware-based coding systems for HEVC, on the other hand, are not only able to achieve high throughput, but also offer low power consumption and some other benefits, when compared with software-based solutions. However, hardware efficiency can be achieved only when the underlying algorithm is hardware friendly. Of the many video encoder modules, motion estimation (ME) is the most computationally intensive one, which is why it is advisable to carry out ME on a hardware-based system, if high performance is required. Most of the ME algorithms presented in the literature focus only on coding efficiency and not on hardware efficiency. In this article, we present a coding- efficient ME algorithm which is more hardware friendly than most modern implementations. The proposed algorithm achieves a throughput of 4 K@42 frames per second (4 K = 3840 × 2160) at a maximum operating frequency of 200 MHz with no degradation in quality, and is comparable to state of the art algorithms, making it suitable for low delay video coding applications such as eHealth.