A SWP Interface Module Verification Method Based on UVM

The single wire protocol (SWP) interface is a new type of interface for SIM card chips used in eNFC mobile payment solutions. In order to achieve a full verification of the SWP interface, a module-level verification environment is built based on the universal verification methodology (UVM). Our work proves that the full-duplex communication mode of the SWP interface is very suitable for using random incentives of the UVM, which can greatly improve the efficiency of interface module verification. In addition, compared to traditional verification methods using directional incentives described by Verilog, The UVM-based verification method can achieve a richer and more comprehensive verification scenario.