Power and Energy Consumption Models for Embedded Applications

This paper describes a study on the power and energy consumption estimation models that have been defined to facilitate the development of ultra-low power embedded applications. During the study, various measurements have been carried out on the instruction and application level to challenge the models against empirical data. The study has been performed on the multicore heterogeneous hardware platform developed for ultra-low power Digital Signal Processors (DSP) applications. The final goal was to develop a tool that can provide insight into power dissipation during the execution of embedded applications, so that one can refactor the source code in an energy-efficient manner, or ideally to develop an energy-aware C compiler. The side effect of the research presents interesting insight into how the custom hardware architecture influences power dissipation. The selected platform has been chosen simply because it represents R&D state of the art ultra-low power hardware used in hearing aids. The presented solution has been developed and tested in an Eclipse environment using Java programming language.