Lateral linear mode avalanche photodiode through 0.35 mu m high voltage CMOS process

This letter reports on a lateral linear mode avalanche photodiode through 0. 35 p.m high voltage CMOS process. The linear mode avalanche photodiode is designed and fabricated with the lateral separate absorption, charge and multiplication (SACM) structure using an epitaxial wafer. The DNTUB layer. DPTUB layer, Pi layer and SPTUB layer are used for the lateral SACM structure. This improves freedom of the design and fabrication for monolithic integrated avalanche photodiode without high voltage CMOS process modifications. The breakdown voltage for the lateral linear mode avalanche photodiode is about 114. 7 V. The dark currents at gain M = 10 and M = 50 are about 15 nA and 66 nA, respectively. The effective responsive wavelength range is 450 similar to 1050 nm. And the peak responsive wavelength is about 775 nm at 20 V while M = 1. With unity gain (M = 1), the responsivity at 532 nm is about half of the maximum.