Comparative Study of 6.5 kV 4H-SiC Discrete Packaged MOSFET, JBSFET, and Co-Pack (MOSFET and JBS Diode)
2022 IEEE 34th International Symposium on Power Semiconductor Devices and ICs (ISPSD)(2022)
Abstract
This paper reports the detailed comparison of packaged level, 6.5 kV rated 4H-SiC power MOSFET, MOSFET co-packaged with JBS diode (Co-Pack), and monolithically integrated 6.5 kV 4H-SiC MOSFET and JBS diode (JBSFET). JBSFET was designed to disable the PN turn for reliability purposes and save the chip and process cost from the one-chip integration and single metal scheme. Static and dynamic electrical characteristics of stand-alone MOSFET, Co-Pack, and JBSFET are compared to signify the benefit of JBSFET in terms of performance, reliability, and economical point of view.
MoreTranslated text
Key words
Silicon Carbide,4H-SiC,MOSFET,JBSFET,Co-Package,Medium Voltage,Double Pulse Test (DPT),Switching,Short Circuit Capability,Stress,Body Diode Degradation
AI Read Science
Must-Reading Tree
Example
![](https://originalfileserver.aminer.cn/sys/aminer/pubs/mrt_preview.jpeg)
Generate MRT to find the research sequence of this paper
Chat Paper
Summary is being generated by the instructions you defined