RFSoC-Based Digital Beamformer for Millimeter-Wave MIMO Applications

This paper presents a novel 4-channel digital beam-forming receiver architecture for 5G millimeter-Wave cellular communications. The receiver is based on a code-multiplexed topology where all the channels are encoded with unique or-thogonal Walsh-Hadamard codes and multiplexed into a single-channel. A single wideband analog-to-digital converter (ADC) on RF-SoC FPGA is employed at the digital back-end which significantly reduces the cost, complexity and power consumption of the hardware realization. The digital signal processor (DSP) algorithms for multi-channel synchronization and beamforming are implemented on the Xilinx ZCU111 RF-SoC FPGA proto-typing platform. An end - to-end measurement setup including ultrawideband antenna array (TCDA), a custom-designed and fabricated Encoder Circuit Board (ECB) and FPGA processor are also included for system validation. A maximum clock frequency of 400 MHz was used for generation of the unique codes and decoding the desired signals at the receiver end. To the best of the author's knowledge a maximum of 36 dB interchannel interference ratio (ICI) was achieved which is the highest to be reported in literature till dates.