NVDimm-FE: A High-density 3D Architecture of 3-Bit/c 2tncfe to Break Great Memory Wall with 10 Ns of PGM-pulse, 10 10 Cycles of Endurance, and Decade Lifetime at 103 °C.

E. R. Hsieh,J. K. Chang,T. Y. Tang,Y. J. Li,C. W. Liang, M. Y. Lin,S. Y. Huang,C. J. Su,J. C. Guo,Steve S. Chung

2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits)（2022）

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关键词

NVDimm-FE,memory hierarchy,3-bit-per-CFE 2-transistors,high density 3D architecture,ultra high density candidate,PGM-pulse,DRAM position,n-ferroelectric capacitances,high performance computing efficiency

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