QEGCN: An FPGA-based accelerator for quantized GCNs with edge-level parallelism

Graph convolutional networks(GCNs) have been successfully applied to many fields such as social networks, knowledge graphs, and recommend systems. The purpose of this research is to design and implement an accelerator for quantized GCNs with edge-level parallelism. We explore the viability of training quantized GCNs, enabling the usage of low precision integer arithmetic during inference. GCNs trained with QEGCN for INT8 quantization perform as well as FP32 models in three most used datasets. Data quantization can significantly reduce the use of logical resources and energy consumption without reducing accuracy. Based on the SAGA-NN model, we improved the original algorithm to achieve parallelism at the edge level. Unlike previous work, we implement the pipeline structure for apply and gather operations at the edge level to achieve fine-grained parallelism. Using our framework, we generate accelerators for GCN models on a state-of-the-art FPGA platform and evaluate our designs. Compared to HyGCN, EnGN, and AWB-GCN, our work achieves 42.1x, 19.3x, 8.31x speedup and 11.6x, 8.1x, 41.68x energy savings on average, respectively.