Effect of Mole fraction and Fin Material on Performance Parameter of 14 nm Heterojunction Si 1-x Ge x FinFET and Application as an Inverter

This work presents a new SOI 14 nm heterojunction FinFET with Si 1-x Ge x fin for low-power digital logic circuits. The channel region of the proposed device consists of Si 1-x Ge x compound semiconductor material. The impact of the Ge-mole percentage (x) on several electrical characteristics has been calculated. In this paper, a single gate material single dielectric material (SGMSD) is used for designing the proposed heterojunction FinFET and its static characteristics are compared with conventional FinFET. For making the heterojunction between the channel region and source/drain region, SiGe is used as a channel (fin) material and silicon is used in drain/source regions. The proposed design shows the higher current ratio (4.51 × 10 12 ) and minimum value of I off Current (1.38 × 10 –18 ) with a minimum value of the subthreshold swing 58.67 mV/dec and minimum value DIBL 52.37 mV/V which is better than the conventional FinFET. In the proposed transistor design, the impact of fin material on the performance parameters of the device is analyzed. The result shows a significant improvement in short channel parameters, device ON/OFF current ratio, noise margin and delay. Also, a heterojunction p-channel FinFET is designed along with corresponding n-channel FinFET to evaluate the transistors for low power CMOS-based logic applications.