A Novel Design of Overpass Channel Synapse Array for Neuromorphic System

In neuromorphic system, the major key factors for synaptic devices are current reduction and scaling when calculating vector-matrix multiplication (VMM) through the current sum. This paper explores an overpass channel synaptic device with asymmetric gate which can increase the effective channel length due to reduce the current and operate the stable multi-bit conductance levels. In addition, the cell size can be reduced by half, by combining the top gate line and drain line into a 3-terminal structure. We proved to control individual conductance using Fowler-Nordheim (FN) tunneling through TCAD simulation, and optimized the top gate length considering the scaling and program efficiency. Finally, this work proposes a novel flash-type NOR-type synapse array with cell size of 10 $\mathbf{F}^{2}$ .