Gate-Termination Frequency Adaptation in a Self-Synchronous Inverse Class-F Rectifier

Owing to the time-reversal duality principle, the circuit of a power amplifier (PA) can be used as a rectifier. Such a rectifier is called a self-synchronous rectifier. In this case, the drain-side network of a PA is fed by the RF-power and the drain bias, connected to a DC-load, obtains rectified dc voltage. When the drain-side network is properly laid out for PA operation, the same network is appropriate for rectifier operation. The gate-side network is crucial for proper rectification, as it provides the synchronous excitation to the transistor gate. Its ideal configuration, however, differs from that of the PA mode. In this paper, the effects of changing the gate-side parameters termination resistance and bias voltage on a class-F ^-1 self-synchronous rectifier are reported. We present, to the authors’ best knowledge, for the first time a shift in the frequency at which maximum rectification efficiency is achieved from 2.28 GHz to 2.44 GHz by a change in the gate termination resistance from 0 Ω to an open circuit, while the frequency steadily increases with increasing resistance. Consequently, peak efficiency of the rectifier can be shifted and controlled.