Stitching Process Development on 300mm Wafer CMOS BEOL for High Performance Chip Application
2022 China Semiconductor Technology International Conference (CSTIC)(2022)
摘要
In this work, stitching process was developed on 300mm wafer CMOS BEOL for high performance chip application. Different stitching pattern and process was designed and implemented to verify the process performance, including different pattern overlap length, hammerhead dimensions, etc. Based on process data, optimized process condition was obtained to achieve better process performance.
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关键词
stitching process development,hammerhead dimensions,pattern overlap length,wafer CMOS BEOL,optimized process condition,data processing,process performance,stitching pattern,high performance chip application,size 300.0 mm
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