Lateral Selective SiGe Growth for Local Dislocation-Free SiGe-on-Insulator Virtual Substrate Fabrication

Dislocation free local SiGe-on-insulator (SGOI) virtual substrate is fabricated using lateral selective SiGe growth by reduced pressure chemical vapor deposition. The lateral selective SiGe growth is performed around a similar to 1.25 mu m square Si (001) pillar in a cavity formed by HCl vapor phase etching of Si at 850 degrees C from side of SiO2/Si mesa structure on buried oxide. Smooth root mean square roughness of SiGe surface of 0.14 nm, which is determined by interface roughness between the sacrificially etched Si and the SiO2 cap, is obtained. Uniform Ge content of similar to 40% in the laterally grown SiGe is observed. In the Si pillar, tensile strain of similar to 0.65% is found which could be due to thermal expansion difference between SiO2 and Si. In the SiGe, tensile strain of similar to 1.4% along 010 direction, which is higher compared to that along 110 direction, is observed. The tensile strain is induced from both [110] and [-110] directions. Threading dislocations in the SiGe are located only similar to 400 nm from Si pillar and stacking faults are running towards 110 directions, resulting in the formation of a wide dislocation-free area in SiGe along 010 due to horizontal aspect ratio trapping.