Optimisation of geometric aspect ratio of thin film transistors for low-cost flexible CMOS inverters and its practical implementation

A low-cost, flexible processor is essential to realise affordable flexible electronic systems and transform everyday objects into smart-objects. Thin film transistors (TFTs) based on metal-oxides (or organics) are ideal candidates as they can be manufactured at low processing temperatures and low-cost per unit area, unlike traditional silicon devices. The development of complementary metal–oxide–semiconductor (CMOS) technology based on these materials remains challenging due to differences in performance between n- and p-type TFTs. Existing geometric rules typically compensate the lower mobility of the metal-oxide p-type TFT by scaling up the width-to-length ( W/L ) ratio but fail to take into account the significant off-state leakage current. Here we propose the concept of an optimal geometric aspect ratio which maximises the inverter efficiency represented by the average switching current divided by the static currents. This universal method is especially useful for the design of low-power CMOS inverters based on metal-oxides, where the large off-current of the p-type TFT dominates the static power consumption of the inverter. We model the inverter efficiency and noise margins of metal-oxide CMOS inverters with different geometric aspect ratios and compare the performance to different inverter configurations. The modelling results are verified experimentally by fabricating CMOS inverter configurations consisting of n-type indium-silicon-oxide (ISO) TFTs and p-type tin monoxide (SnO) TFTs. Notably, our results show that reducing W/L of metal-oxide p-type TFTs increases the inverter efficiency while reducing the area compared to simply scaling up W/L inversely with mobility. We anticipate this work provides a straightforward method to geometrically optimise flexible CMOS inverters, which will remain relevant even as the performance of TFTs continues to evolve.