E-Test Validation of Space Error Budget and Metrology

G. Schelcher,E. P. De Poortere, N. Kissoon,S. Paolillo,Marsil de A. Costa E. Silva, Y. Zhang,C. Tabery,J. Mulkens, M. McManus, P. Leray, S. Halder

IEEE Transactions on Semiconductor Manufacturing(2022)

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摘要
The electrical validation of a generalized space error model is reported. This was achieved by comparing inline e-beam “direct” space metrology measurements with an end-of-line, yield-based, space error metric. This electrical test (e-test) of the space error is derived from the conductance of metallized test structures with programmed interlayer offsets between line and block layers used for patterning. Local space variation was extracted from voltage contrast arrays, and from inline metrology statistics. A good match was observed between the predicted space error from the weighted sum of the local and non-local terms, and the measured e-test space error. A model is proposed for the experimental validation of the local term (stochastic) of the space error model.
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关键词
Space error,edge placement error,electrical test device,voltage contrast
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