Development of a CMOS pixel sensor prototype for the high hit rate CEPC vertex detector

The proposed Circular Electron Positron Collider (CEPC) imposes new challenges for the vertex detector in terms of material budget, spatial resolution, readout speed, and power consumption. It is necessary to design and construct the CEPC vertex detector with state-of-the-art silicon detector technologies. A dedicated CMOS Pixel Sensor chip, named TaichuPix, is being developed for the first 6-layer CEPC vertex detector prototype. The TaichuPix development is based on a fast in-pixel readout combined with a hit-driven architecture, which would be beneficial for the high hit rate. This work reports the requirements for the sensor and the design approach being followed to cope with it. Two small-scale prototypes (25 mm2) capable of achieving a hit rate up to 36 MHz/cm2, were designed in a 180 nm CMOS process. One of them, the TaichuPix-2 prototype was characterized with electrical and radioactive sources in the laboratory. The test results on the chip functionality and the pixel performance in terms of threshold and noise as well as the timing response are reported.