Charge transfer efficiency of CCDs with a single-polysilicon gate structure

We are characterizing high-frame-rate, low-power X-ray CCDs developed at MIT Lincoln Laboratory for future strategic missions. These devices incorporate a novel, single-level polysilicon gate structure enabling fast, low-power charge transfer. We report and compare charge transfer efficiency measurements on devices from two prototype fabrication lots at row (parallel) transfer rates up to 1 MHz and over a range of device temperatures. We find that devices from the second lot have substantially improved charge transfer efficiency, especially at low temperatures, with charge transfer inefficiency (CTI) as low as 10(-6) per pixel at 1 MHz with 3 V clock swings. This performance is comparable to that of the best legacy triple-poly MIT Lincoln Laboratory devices operating at much lower transfer rates with significantly larger clock swings.