A Novel Adaptive-Refresh Scheme to Reduce Refresh with Page Endurance Variance in 3D TLC NAND Flash Memories

With aggressive scaling and multi-bit storage technology, reliability issues of 3D NAND flash memory are increasingly serious. Flash memory reliable storage time is limited by retention errors. Refresh has been an effective approach to extend storage time by rewriting the data. The critical issue is that it brings additional read and write operations, seriously degrades system performance. In this paper, a novel adaptive refresh scheme is proposed to reduce refresh count by exploiting the page endurance variance in 3D TLC NAND flash memory. Experimental results show that the scheme can significantly reduce refresh count.